Sband transmiter

(see also standby seq. it includes the filament on sequence).
There is a hardware filament timer in the dome. It is a oneshot on 190211-sh1 U14 the FO card.

It starts counting when st.ttiDI.filTmrRlyCmd_9_10 is true:

The relay command is true when the filament Voltage and current proofs are true for both klys'

kly1FilCurPrf_6_10, kly2FilCurPrf_6_20, kly1FilVPrf_6_40,kly2FilVPrf_6_80.

It is set to count for 880 seconds. It is retriggerable if it loses one of the proofs.
Tracing the signal through the schematics:

FilTmrRlyCmd to start the counting comes from up in the dome:

190152 sh8 combLogic Chip U19

190223 sh1 shows chip with pinouts (pin 7 out)

logic on 190362 shows which proofs it needs. filV,filC, etc.
190223 sh1,N shows the driver after pin 7 on the chip
comes down on tti3pin 13 (filTimerRlyCmd) sch 19012 xao3
Goes to one shot to start counting on 190211-sh1 U14 on fiber optic card.

190211-sh1 U14 FO Card has one shot.

If filTimCmd loses one of it's proofs, it can restart the 880 sec timer.

There is a software timer in the cpu that counts down from 25 minutes.

The schematic calls it operations filament timer
The flag is called filset. the counter is cntr.filTmr_c40
It is counted down in the interrupt routine (18.2 hz) if counter !=0 and filContProof is true.
If filTmrRlyCmd is true and counter > 16380 set counter to 16380. This causes the cpu counter to jump down to 15 minutes if the hardware timer has started and the cpu timer is > 15 minutes.
filset is set to 1 in interrupt routine when filContPrf true and counter decrements to 0.
It is sent to the dome on TTI_10 pin 06.

The hardware timer and the cpu timer are anded to give st.ttiDI.filTmrDone_9_20

190152 sh8 or 190362 p27 fil timer complete ind. It comes down on ttI_3 pin 14

The hardware and software timer are part of the large and gate that is required before the high voltage can come on.

Debugging the timer:

stats[9] filTmrDone --> it is done and ok.. If not:

stats[9] bit4 filTmrRlyCmd make sure it is set. This starts the counting

If not look for stats[6] klystron proofs V and I.

Check computer counter40 for filament timer countdown.

It needs filContPrf stats[20] to decrement.
When it hits zero, it sets the variable filset=1.
If filset=1 then the computer filament timer done is sent to the dome on ttiDO(10,bit6). This gets and'ed with the hardware timer. (sch 190362)

Check the hardware counter output. (shm 190152 sh 8 p1-B16)

This signal is also part of hv Ready that goes from the dome to hvps via fiber.. (190362)

Keep Alive.

The keep alive signal (watch dog timer) is used to guarantee that the pc 723 program is still running. The pc toggles a bit in it's interrupt routine (18 hz). This gets sent to the HVPS and to the dome. This 10 pps signal goes into a retriggerable one shot that has a time constant gt than 100 ms. The ok state for the flipflop output is 0 (set by reset). As long as it gets retriggered every 100 ms, the one shot will remain with a 0 output. If the oneshot output drops, then the following edge of the D input will cause a 1 on the output (not ok). This will shut down things. The keepalive report from the logic chips that use the keep alive are sent back down via the tti digital inputs.

723.c

newtick interrupt routine:

cntr.aliveToggle_c16 (counter 16). gets toggled every 18 hz interrupt.
This value is sent to the digital out of the dome and HVPS. It is called keep alive or 10 pps.

dome keep alive

signal:

723.c tto(10,7) to dome (schematic 190162 sh 6.xa10 pin 7). It is called 10pps
To 1 shot on sch. 190208 via backplane TB1.
Into one shot U1A (this failed on 08mar09)

The one shot is set for a time constant gt 100 ms.
As long as the keep alive pulse arrives at 10 Hz, the one shot output will always be high.

To A8 board 190152 sh 8. (board level schematic) ends up in U19 pld for hv Ready...

chip level on 190223 sh 2 p1-b32.
Enter pld U44 on pin 41 then straight out on P77 (see shm 190364 logic diagram). Not used on this chip.
Then goes to U19 p51 . D input of flip flop (active low).

The FF output is set low by the reset falling edge.
It will stay low unless keepalive goes to 0 (we loose it).

The FF output is inverted and sent to the dome HV ready AND gate.

If keep alive goes low, the Dome HV ready goes low.
This Causes standby green light to go off
drops the ground switch ssr which (i think) causes a crowbar. (190374).

Monitoring:

brd A8. brd sch. 190252 (logic 190362 U19, 190364 U44)

U19 pin 45 output (keep alive report)

To U44. pin83 inp, out on P37.
Inverted and output on p1-a21 (190223 sh 3.. you can probe it here).

Dome TTI digital input (190162 sh 3. xa3 pin 6.

computer stores this in

hvps keep alive:

signal:

tto(13,13) hvps (schematic 190154 xa3 pin 13).
to be finished...

Magnets don't turn on:

Normally this is called from standby after the cooling has started and the filament has been started (filContPrf_20_10 true).

To start need (assume kly1 in the examples):

if(st.ttiDI.kly1Sel_8_1 && !st.ttiDI.kly1MagContPrf_20_20) magnet1(1).

kly1 selected and don't have kly1 magnet contactor proof.

if(!(!st.ttiDI.kly1MagOT_13_8&&st.ttiDI.kly1MagFlwPrf_5_40)) cooling(1)

If magnet overtemp or missing magnet flow proof then go back and try restarting the cooling.

Send the magnet start command to hvps tto(13,9,1)

doesn't look like this is in the database.

Schematics:

190154 sh-1 has the tti DigOut module . show Pn->Jn which are flipped (see sh- 2-2)
190235 sh-3 has the pld chip with it's connections.
190374 has the logic diagrams of what the chip does. The Pn are pin numbers

Check that digOutput bit is getting to the power supply building. In hvps: look at the front of the tti module:

XA3 190154 bit 9. should be high
Then bit9 -> p4-12(109154) to (190235 sh3) -> J4-2 -> pin 59 of chip (190374 logic)
the command gets anded with not kly1MagReady (p74 of chip) that comes from upstairs).
the comand then get sent out chip pin 27 v1 magnet contactor ->chips -> J5-3 .. (190235 sh3,4)

j5-3 -> p5-11 -> tb1-15 kly1magnet contactor ssr (190154 sh1)

to be finished...

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