GALFA Spectrometer Board Test Procedure
Note: This test procedure requires a CompactPCI backplane that is not
installed in a chassis, with a DC power supply capable of supplying
+5V, +3.3V, and -12V. It is best if the power supply has adjustable
current output limits, and if the various supply rails can be
independently applied to the test backplane.
New Board Bring-Up Procedure
- Check all chip orientations
and tantalum capacitor polarizations; remove ALL jumper caps
- Turn off all power supplies to backplane; install board into
- On-board power supplies
- Using a current limit of ~0.4A, apply +5V to backplane;
monitor for excessive current draws
- Measure +1.5V switching regulator output (J10 Pin 3,
J10 Pin 4, J21 Pin 3, or J21 Pin 4)
- Measure +2.5V switching regulator output (J12 Pin 3,
J12 Pin 4, J20 Pin 3, or J20 Pin 4)
- Measure +3V linear regulator output (J17 Pin 3 or Pin 4)
- Turn off +5V supply
- Using a current limit of ~0.4A, apply -12V to backplane;
monitor for excessive current draws
- Measure -3V linear regulator output (J16 Pin 3 or Pin 4)
- Remove all supply voltages to backplane
- Board test
- Simultaneously apply +5V, +3.3V, -12V to backplane; check for
excessive current draws
- Re-check all voltage regulator outputs; check for overheating
regulators, ADCs, FPGAs, etc.
- Turn off all power; install jumpers to supply +1.5V, +2.5V to
FPGAs; +3V, -3V to ADCs (see jumper
- Install crystal oscillator and jumper for on-board clock
- Check for correct clock frequency
- Jumper JP2 to set 2V1000 FPGA for Boundary-Scan programming mode
- Using JTAG cable, program 2V1000 with test program (ie., LED blinker)
- Jumper JP1 to set 2V4000/2V6000 FPGA for Boundary-Scan programming mode
- Using JTAG cable, program 2V4000/2V6000 with test program (ie., LED
Note: It has been found that leaving J16 and J17 jumpered can
cause programming the BF957 FPGA to fail, possibly due to noise
from the ADCs interfering with the download cable. If programming
fails repeatedly, try removing jumper caps from J16 and J17
- Using JTAG cable, burn XC18V04 PROM with pcib_r.mcs
from latest release
- CompactPCI chassis operation (brief)
- Set jumper JP2 for 2V1000 Master Serial programming mode
- Set jumper JP1 for 2V4000/2V6000 Slave Serial programming mode
- Make sure cPCI backplane is jumpered for 3.3V VI/O
- Install 1 spectrometer board + 1 pre-configured CPU board into
cPCI chassis and boot up
- Check LEDs 1, 2 for successful
programming of FPGAs
- Run lspci to make sure
installed board returns
02:xx.0 Co-processor: Xilinx Corporation: Unknown
device 0333 (rev 05)
- Apply stimulus to spectrometer board inputs and use
diagnostics to check ADC operation
CompactPCI Chassis Operations Test (Extensive)
- Make sure CPU board installed with latest OS revision
- Run "lspci" and make sure that the PCI interface is rev.
05 or greater:
02:0b.0 Co-processor: Xilinx Corporation:
Unknown device 0333 (rev 05)
- Run "gload -mtest" to test PCI interface:
# gload -mtest
Let it run for a couple of minutes, any error is bad.
- Manually load Xilinx part a few times to verify Xilinx loading
# zcat /fpga/gk6_r.bin.gz | gload -load
- Pattern test accumulators in GALFA
This tests all of the wires between the 2v6000 and the 2v1000
as well as a lot of logic.
# gdiag -patt
Let it run for a minute without error.
- Watch a sine wave using the internal digital signal generators
This should show two complex sine waves of 1.0MHz and 3.0MHz.
# gdiag -scope -ta=1.0 -tb=3.0
A picture of this is enclosed as pic-001.gif.
Note power of signals is slightly less than -20dBm.
- Watch internally-generated sine waves passing through the
low pass filter with the complex mixer mixing with DC.
# gdiag -scope -lpf -ta=0.5 -tb=4.0 -mix=0
A picture is enclosed as pic-0002.gif.
Note that second signal is filtered to almost nothing (-40db) and
first signal has the same -20dBm level as the signal generator.
- Watch test signals through wideband and narrowband PFBs:
# gdiag -galfa -ta=-18.1 -tb=-18.2 -mix=26
This generates signals at -18.1MHz and -18.2MHz. In the
wideband display you should see pic-0003.gif,
the narrowband PFB should show the peaks in
At this point the digital end of things is fully verified, but
the ADCs haven't been used yet.
- Test the ADCs with no signal.
With the following command the ADCs should look something
# gdiag -galfa
The ADCs can also be tested with gdiag -scope
to view the ADCs like an oscilloscope. Test signal levels
against a known reference signal.