This is the top level of the 2v6000 virtex2 fpga for galfa.

The makefile at this level should build the entire chip
from scratch and leave the bitfile image in 
build/gk6_r.bin.gz  (or build1/...).

There is an open office spreadsheet of chip resources
in budget.xls.

The directories are as follows:

src     The source code for the chip is here.  The top level
        is gk.v and the lower level modules are in files
        named the same as the module.  Some major sections
        of the chip are generated by perl scripts and kept
        in separate directories as follows.

n_cmix  The complex mixer for the narrowband signal path.
        Generated by jfft.

n_lpf   The lowpass filter for the narrowband signals path.
        Generated by jfft.

n_pfb   The 8k decimated polyphase filter.
        Generated by jfft.

w_fft   The 256-pt fft (or PFB) for the wideband signal path.
        Generated by jfft.

sim     Behavioral simulation

sim_r   gate level simulation

build   Build the final chip using separately synthesized modules
        from the other directories.

build1  Synthesize and build the chip in 1 go.  This takes
        a lot of memory, but seems to be a bit faster.