#!/usr/bin/perl

#
# Jeff Mock
# 2030 Gough 
# San Francisco, CA 94109
# jeff@mock.com
# (c) 2004
#

#
# $Id: mkdlpf_rdel 190 2004-08-10 00:51:03Z jeff $
#

use Getopt::Long;
use Math::Trig;
use Math::BigInt;

$opt_width      = 8;    # datapath width
$opt_length     = 16;
$opt_dir        = ".";
$opt_odir       = ".";
$opt_prefix     = "jlpf";
$opt_imp        = "virtex2";
$opt_norun      = 0;

$0 =~ /(.*)\/.*/;
$opt_dir = $1 eq "" ? "." : $1;

%opts = (
    'width=o'                   => \$opt_width,
    'length=o'                  => \$opt_length,
    'dir=s'                     => \$opt_dir,
    'odir=s'                    => \$opt_odir,
    'prefix=s'                  => \$opt_prefix,
    'imp=s'                     => \$opt_imp,
    'norun'                     => \$opt_norun,
);

if (!GetOptions(%opts)) {
    print STDERR "
        Generate pieces of verilog for a decimating FFT
        
        mkdlp_rdel [options]
            [--width=n]     Datapath width ($opt_width)
            [--length=n]    Delay length ($opt_delay)
            [--dir=s]       Directory with other mkdlp_rdel programs ($opt_dir)
            [--odir=s]      Output directory for verilog ($opt_odir)
            [--prefix=s]    Prefix module name with string ($opt_prefix)
            [--norun]       Do not recurse and build sub-modules
            [--imp=s]       Set target implementation ($opt_imp)

    \n";
    exit 1;
}

sub pcode {
    my $fd = shift;
    my $sp = shift;
    my $code = shift;

    $code =~ s/^.*?\n//m;
    $code =~ s/^ {$sp}//mg;
    $code =~ s/ *$//;
    print $fd $code;
}

sub log2 {
    my  $v = shift;
    return int(log(2*$v-1)/log(2));
}

sub sub_module {
    my $cmd = join(' ', @_);
    
    $cmd = "perl " . $opt_dir . "/" . $cmd;
    $cmd .= " --width=${opt_width}";
    $cmd .= " --dir=${opt_dir}";
    $cmd .= " --odir=${opt_odir}";
    $cmd .= " --prefix=${opt_prefix}";
    $cmd .= " --imp=${opt_imp}";

    # print "Running $cmd\n";
    die "sub-commmand failed: $cmd\n   $!" 
        if system($cmd);
}

sub dlpf_rdel_module {
    my  $fd;
    my  $fn = "${opt_odir}/${opt_prefix}_rdel_${opt_length}.v";

    if (-s $fn) {
        print "    $fn exists, mkdlp_rdel not creating\n";
        return 0;
    }
    print "    Creating $fn\n";
    open $fd, "> $fn" or die "mkdlp_rdel cannot create file $fn.\n  $!";

    my  $lenm1 = $opt_length-1;
    my  $asz = log2($opt_length);
    my  $aszm1 = $asz - 1;

    pcode ($fd, 8, "
        //  DLPF reverse delay module
        //  
        //  Word width = ${opt_width}
        //  Implemention in ${opt_imp}
        //
        //  Generated by mkdlp_rdel
        //
        module ${opt_prefix}_rdel_${opt_length} (
            ck,
            addr,
 
            a_re,
            a_im,
            x_re,
            x_im
        );
            parameter                   width=${opt_width};
 
            input                       ck;
            input   [${aszm1}:0]        addr;
 
            input   [width-1:0]         a_re;
            input   [width-1:0]         a_im;
 
            output  [width-1:0]         x_re;
            output  [width-1:0]         x_im;

            reg     [width-1:0]         mem_a_re  [0:${lenm1}];
            reg     [width-1:0]         mem_a_im  [0:${lenm1}];
            reg     [width-1:0]         x_re;
            reg     [width-1:0]         x_im;

            always @(posedge ck) begin
                mem_a_re[addr] <= a_re;
                mem_a_im[addr] <= a_im;
                x_re <= mem_a_re[addr];
                x_im <= mem_a_im[addr];
            end
        endmodule
    ");
    close $fd;
}

dlpf_rdel_module();